FEKT-BMICAcad. year: 2015/2016
The course is focused on foundations of logical circuits and microprocessor and embedded systems. Students are familiarized with design of combination and sequential logical circuits, application of microcontrollers, memory systems and memory management. The students will achieve practical experience with programing of the microcontrollers in assembler and C language.
Learning outcomes of the course unit
Graduate should be able to:
- design combination logical circuits,
- design sequence logical circuits based on Moore or Mealy finit state machine,
- design connection of external memory with microcontroller,
- create software for microcontroller in assembly and C language,
- describe memory hierarchy and explain usage of cache memory,
- explain difference between microprocessor, microcontroller, DSP and signal controller,
- explain segmentation, paging and virtual memory.
The student should be able to create simple C language program and explaine function of the elementary electronic parts.
- compulsory prerequisite
Recommended optional programme components
Recommended or required reading
Pinker J., Poupa M. Císlicové systémy a jazyk VHDL. Praha: BEN, 2006. 349 s. ISBN 80-7300-198-5. (CS)
Ličev L., Morkes D., Procesory - architektura, funkce, použití. Brno: Computer press, 1999. 260 s. ISBN 80-7226-172-X. (CS)
Brandejs, M., Mikroprocesory Intel 8086 - 80486. Praha: Grada, 1991. 256 s. ISBN 80-85424-27-4. (CS)
Planned learning activities and teaching methods
Techning methods include lectures, computer laboratories. Students have to create six assignments during the course.
Assesment methods and criteria linked to learning outcomes
Up to 40 points for the computer exercises including 10 points for the individual assignments and 30 points for two tests.
Up to 60 points for the final oral examination.
Language of instruction
1. Logical function. Boole's algebraic. Simplification of the logical functions. Realization of logical circuits wits NAND and NOR.
2. Binary decoder, multiplexor, demultiplexor, analog multiplexor, priority coder, digital comparator, code transformation.
3. Flip-flop: principle, RS, D, JK, T, master-slave flip-flop. Sequence logical circuits: finite state automat, Huffman's model of sequential automat, Mealy and Moore automat.
4. Data registers, shift registers, synchronous and asynchronous counters, deviders.
5. Von Neumann`s conception of the computer. Base cycle of the computer. Computer block diagram, ALU, controller, registers, memory, peripheral devices. Memory organization. Microprocessor, microcontroller, digital signal processor, digital signal controller.
6. Program, instruction, instruction set, types of instruction. Addressing modes.
7. Machine code, assembler. Subrutins, stacks manipulation. Difference between subrutin and macro.
8. I/O servicing: polling, interrupt-driven I/O, using DMA. Interrupt servicing. Mask, nonmask and pseudomask interrupts. Reset.
9. Peripheral subsystems of microcontrolers: ports, clock generation units, real-time interrupts , watchdog, timers, PWM, A/D and D/A convertors, SCI, SPI, IIC. Freescale HCS08 family microcontrollers.
10. Von Neumann, Harvard and modified Harvard architectures. Pipelining. Superscalar architecture. Multiprocessor systems and processor fields.
11. Memories, memory parameter. Principle and property of memory: SRAM, DRAM, SDRAM, DDR RAM, FeRAM, MRAM, EPROM, EEPROM, FLASH.
12.Memory bus interface. Memory hierarchy, memory cache.
13. Memory management. Address space. Logical and physical address. MMU. Base and limit registers. MMU. Paging and segmentation. Virtual memory.
The aim of the course is to teach the students to design the combination and sequence logical circuits, to give them base information about the principles of the microprocessors systems, the subsystems of the microcontrollers, and the software design for the embedded systems.
Specification of controlled education, way of implementation and compensation for absences
The computer exercises is compulsory, the properly excused missed computer exercises can be compensate.