Publication detail

RSD Algorithm Implementation to Semiflash ADC

SKOČDOPOLE, M., VRBA, R., HÁZE, J., FUJCIK, L.

Original Title

RSD Algorithm Implementation to Semiflash ADC

Type

journal article - other

Language

English

Original Abstract

RSD algorithm was implemented to cycles or pipelined switched-current analog-to-digital converter (ADC), where resolution of sub-converter is 1,5 bit. This implementation is well known. Implementation of RSD algorithm to ADC with 2,5-bit sub-converter is presented in this paper. The most critical blocs in classical ADC are reference currents sources and comparators. Usage of this algorithm decrease inaccuracy of these blocks impact on accuracy of full ADC.

Keywords

Analog-to-Digital Converter, ADC, RSD Algorithm, Switched-Current Technique, Semiflash ADC

Authors

SKOČDOPOLE, M., VRBA, R., HÁZE, J., FUJCIK, L.

RIV year

2004

Released

1. 1. 2004

Publisher

WSEAS

Location

Rio de Janeiro

ISBN

1109-2734

Periodical

WSEAS Transactions on Circuits

Year of study

2004

Number

9

State

Hellenic Republic

Pages from

1971

Pages to

1973

Pages count

3

BibTex

@article{BUT42227,
  author="Michal {Skočdopole} and Radimír {Vrba} and Jiří {Háze} and Lukáš {Fujcik}",
  title="RSD Algorithm Implementation to Semiflash ADC",
  journal="WSEAS Transactions on Circuits",
  year="2004",
  volume="2004",
  number="9",
  pages="3",
  issn="1109-2734"
}