Publication detail

An algorithmic A/D switched-current converter for smart signal digitization with self-test features

VRBA, R., VEČEŘA, I.

Original Title

An algorithmic A/D switched-current converter for smart signal digitization with self-test features

English Title

An algorithmic A/D switched-current converter for smart signal digitization with self-test features

Type

journal article - other

Language

en

Original Abstract

Practical aspects of the implementation of test circuitry into CMOS design of an analogue-to-digital converter are discussed. A design-for-test in switched-current mode circuitry is focused. As an example, analysis of an A/D converter designed in switched-current technique is used for data sampling. The problems concerned with controllability and observability of internal nodes are discussed. A pipelined switched-current A/D converter designed in 0.6 m CMOS technology is described. Current mode enables operation down to 3 V thus is suitable for battery powered applications. The system integrates band-gap reference and independent supervisory circuit with 1% accuracy. Current consumption in sleep mode is less than 1 A. A/D converter is prepared to meet 1452.2 specifications. The models were used to verify theoretical proposals by means of SPICE simulations.

English abstract

Practical aspects of the implementation of test circuitry into CMOS design of an analogue-to-digital converter are discussed. A design-for-test in switched-current mode circuitry is focused. As an example, analysis of an A/D converter designed in switched-current technique is used for data sampling. The problems concerned with controllability and observability of internal nodes are discussed. A pipelined switched-current A/D converter designed in 0.6 m CMOS technology is described. Current mode enables operation down to 3 V thus is suitable for battery powered applications. The system integrates band-gap reference and independent supervisory circuit with 1% accuracy. Current consumption in sleep mode is less than 1 A. A/D converter is prepared to meet 1452.2 specifications. The models were used to verify theoretical proposals by means of SPICE simulations.

RIV year

2004

Released

01.03.2004

Pages from

153

Pages to

160

Pages count

8

BibTex


@article{BUT41732,
  author="Radimír {Vrba} and Ivo {Večeřa}",
  title="An algorithmic A/D switched-current converter for smart signal digitization with self-test features",
  annote="Practical aspects of the implementation of test circuitry into CMOS design of an analogue-to-digital converter are discussed. A design-for-test in switched-current mode circuitry is focused. As an example, analysis of an A/D converter designed in switched-current technique is used for data sampling. The problems concerned with controllability and observability of internal nodes are discussed. A pipelined switched-current A/D converter designed in 0.6 m CMOS technology is described. Current mode enables operation down to 3 V thus is suitable for battery powered applications. The system integrates band-gap reference and independent supervisory circuit with 1% accuracy. Current consumption in sleep mode is less than 1 A. A/D converter is prepared to meet 1452.2 specifications. The models were used to verify theoretical proposals by means of SPICE simulations.",
  chapter="41732",
  journal="MEASUREMENT, Journal of the International Measurement Confederation (IMEKO) 
",
  number="2",
  volume="35",
  year="2004",
  month="march",
  pages="153",
  type="journal article - other"
}