Publication detail

Reduction of the transistor mismaches effects in SI circuits

PROKOP, R., MUSIL, V., STEHLÍK, J.

Original Title

Reduction of the transistor mismaches effects in SI circuits

Czech Title

Redukce vlivu rozdílných vlastností tranzistorů na obvody se spínanými proudy

English Title

Reduction of the transistor mismaches effects in SI circuits

Type

conference paper

Language

en

Original Abstract

The switched current (SI) circuits with reduced effect of transistor mismatches are introduced. Elimination of this phenomenon is achieved by a modification of an already known SI basic unit-delay cell, in such a way that the number of required current mirror circuits is reduced. These cells can be used as a building block of any arbitrary sampled-data transfer function. As an example, a SI bilinear integrator circuit was designed.

Czech abstract

Jsou uvedeny obvody se spínanými proudy (SI) se zmenšeným vlivem shodnosti tranzistorů. Zmenšení tohoto vlivu je docíleno modifikací již známé SI základní buňky tak, že je omezen počet potřebných proudových zrcadel. Tyto buňky budou použity jako stavební bloky pro komplexní obvody zpracování vzorkovaného signálu. Jako příklad byl navržen bilineární integrátor se spínanými proudy.

English abstract

The switched current (SI) circuits with reduced effect of transistor mismatches are introduced. Elimination of this phenomenon is achieved by a modification of an already known SI basic unit-delay cell, in such a way that the number of required current mirror circuits is reduced. These cells can be used as a building block of any arbitrary sampled-data transfer function. As an example, a SI bilinear integrator circuit was designed.

Keywords

switched current circuit, transistor mismatching

RIV year

2004

Released

14.09.2004

Publisher

Zd. Novotný

Location

Chania

ISBN

80-214-2819-8

Book

Proceedings of the Socrates Workshop 2004

Pages from

145

Pages to

149

Pages count

5

BibTex


@inproceedings{BUT11863,
  author="Roman {Prokop} and Vladislav {Musil} and Jiří {Stehlík}",
  title="Reduction of the transistor mismaches effects in SI circuits",
  annote="The switched current (SI) circuits with reduced effect of transistor mismatches are introduced. Elimination of this phenomenon is achieved by a modification of an already known SI basic unit-delay cell, in such a way that the number of required current mirror circuits is reduced. These cells can be used as a building block of any arbitrary sampled-data transfer function. As an example, a SI bilinear integrator circuit was designed.",
  address="Zd. Novotný",
  booktitle="Proceedings of the Socrates Workshop 2004",
  chapter="11863",
  institution="Zd. Novotný",
  year="2004",
  month="september",
  pages="145",
  publisher="Zd. Novotný",
  type="conference paper"
}