Publication detail

Design of the 16bit Delta Sigma Converter for Sensor Signal Processing

PAVLÍK, M. KLEDROWETZ, V. PRISTACH, M. BOHRN, M. FUJCIK, L. HÁZE, J.

Original Title

Design of the 16bit Delta Sigma Converter for Sensor Signal Processing

English Title

Design of the 16bit Delta Sigma Converter for Sensor Signal Processing

Type

conference paper

Language

en

Original Abstract

The paper deals with a design of the 16-bit MASH Delta-sigma converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.

English abstract

The paper deals with a design of the 16-bit MASH Delta-sigma converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.

Keywords

Delta-sigma modulation, MATLAB, Sensor systems and applications, Solid state circuit design, Switched capacitor circuits

RIV year

2014

Released

01.07.2014

Location

Berlín

ISBN

978-80-214-4983-1

Book

37th Internation Conference on Telecommunications and Signal Processing

Pages from

100

Pages to

104

Pages count

4

Documents

BibTex


@inproceedings{BUT111748,
  author="Michal {Pavlík} and Vilém {Kledrowetz} and Marián {Pristach} and Marek {Bohrn} and Lukáš {Fujcik} and Jiří {Háze}",
  title="Design of the 16bit Delta Sigma Converter for Sensor Signal Processing",
  annote="The paper deals with a design of the 16-bit MASH Delta-sigma converter utilizing switched capacitor technique (SC). The attention was paid to reach 16bit of ENOB resolution even the same precision of STF in band. This requirement is crucial to evaluation of the signal amplitude independently on its frequency. Multistage structure of two second order CIDIDF modulator was used. The system consists of continuous time amplifier, switched Delta-sigma modulator and decimation digital filter. The ONSemi I3T25 350nm CMOS technology was used for the design. The value of SNDR = 106.5 dB (ENOB = 17.4 bits) was achieved.",
  booktitle="37th Internation Conference on Telecommunications and Signal Processing",
  chapter="111748",
  howpublished="electronic, physical medium",
  year="2014",
  month="july",
  pages="100--104",
  type="conference paper"
}