Publication detail

Digital Signal Soft-Processor for Video Processing

PRISTACH, M. HUSÁR, A. FUJCIK, L. HRUŠKA, T. MASAŘÍK, K.

Original Title

Digital Signal Soft-Processor for Video Processing

English Title

Digital Signal Soft-Processor for Video Processing

Type

conference paper

Language

en

Original Abstract

The paper presents a digital signal soft-processor DVSP that was designed using architecture description language ISAC by a tool for processor design called Lissom. Processor is optimized for several video-processing algorithms. Features and instruction set extensions that were introduced to its basic instruction set are described. Processor was synthesized for several Xilinx FPGAs and synthesis and performance results are presented.

English abstract

The paper presents a digital signal soft-processor DVSP that was designed using architecture description language ISAC by a tool for processor design called Lissom. Processor is optimized for several video-processing algorithms. Features and instruction set extensions that were introduced to its basic instruction set are described. Processor was synthesized for several Xilinx FPGAs and synthesis and performance results are presented.

Keywords

architecture description language, digital signal processor, field programmable gate array, hardware/software co-design

RIV year

2011

Released

22.06.2011

Publisher

Vysoké učení technické v Brně

Location

Brno

ISBN

978-80-214-4303-7

Book

Electronic Devices and Systems IMAPS CS International Conference 2011 Proceedings

Edition

první

Pages from

180

Pages to

185

Pages count

6

BibTex


@inproceedings{BUT72427,
  author="Marián {Pristach} and Adam {Husár} and Lukáš {Fujcik} and Tomáš {Hruška} and Karel {Masařík}",
  title="Digital Signal Soft-Processor for Video Processing",
  annote="The paper presents a digital signal soft-processor DVSP that was designed using architecture description language ISAC by a tool for processor design called Lissom. Processor is optimized for several video-processing algorithms. Features and instruction set extensions that were introduced to its basic instruction set are described. Processor was synthesized for several Xilinx FPGAs and synthesis and performance results are presented.",
  address="Vysoké učení technické v Brně",
  booktitle="Electronic Devices and Systems IMAPS CS International Conference 2011 Proceedings",
  chapter="72427",
  edition="první",
  howpublished="print",
  institution="Vysoké učení technické v Brně",
  year="2011",
  month="june",
  pages="180--185",
  publisher="Vysoké učení technické v Brně",
  type="conference paper"
}