Publication detail

Can Message Passing Architecture Outperform EREW PRAM?

DVOŘÁK, V. ČÁBEL, M.

Original Title

Can Message Passing Architecture Outperform EREW PRAM?

English Title

Can Message Passing Architecture Outperform EREW PRAM?

Type

conference paper

Language

en

Original Abstract

This article wants to show that, contrary to popular belief, solving some problems on a message passing architecture (MPA) may be faster than solution on an abstract EREW PRAM machine. The reason is that communication on MP architecture can be hidden by SW pipelining, but shared memory communication in PRAM cannot be, in principle, overlapped with processing. In this paper we present an example of artificial neural network implementation, where, under certain circumstances, MPA can provide faster execution and a better speedup than EREW PRAM.

English abstract

This article wants to show that, contrary to popular belief, solving some problems on a message passing architecture (MPA) may be faster than solution on an abstract EREW PRAM machine. The reason is that communication on MP architecture can be hidden by SW pipelining, but shared memory communication in PRAM cannot be, in principle, overlapped with processing. In this paper we present an example of artificial neural network implementation, where, under certain circumstances, MPA can provide faster execution and a better speedup than EREW PRAM.

Keywords

Parallel processing, EREW PRAM model, Message passing architecture, Performance prediction, Transim tool

RIV year

2001

Released

01.01.2001

Location

Hradec nad Moravicí

ISBN

80-85988-57-7

Book

Proceedings of the 35th Spring International Conference Modelling and Simulation of Systems MOSIS 2001

Pages from

109

Pages to

114

Pages count

6

Documents

BibTex


@inproceedings{BUT5580,
  author="Václav {Dvořák} and Miloš {Čábel}",
  title="Can Message Passing Architecture Outperform EREW PRAM?",
  annote="This article wants to show that, contrary to popular belief, solving some problems on a message passing architecture (MPA) may be faster than solution on an abstract EREW PRAM machine. The reason is that communication on MP architecture can be hidden by SW pipelining, but shared memory communication in PRAM cannot be, in principle, overlapped with processing. In this paper we present an example of artificial neural network implementation, where, under certain circumstances, MPA can provide faster execution and a better speedup than EREW PRAM.",
  booktitle="Proceedings of the 35th Spring International Conference Modelling and Simulation of Systems MOSIS 2001",
  chapter="5580",
  year="2001",
  month="january",
  pages="109--114",
  type="conference paper"
}