Publication detail

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

KHATEB, F. KHATIB, N. KOTON, J.

Original Title

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

English Title

Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA

Type

journal article

Language

en

Original Abstract

In this paper, novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of +-0.5 V and ultra-low-power consumption of mere 10 uW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 um CMOS technology are included as well to validate the functionality of the proposed circuit.

English abstract

In this paper, novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of +-0.5 V and ultra-low-power consumption of mere 10 uW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 um CMOS technology are included as well to validate the functionality of the proposed circuit.

Keywords

Floating-gate MOST; Low-voltage ultra-low-power analog circuit design; Current mode; DVCC; Universal filter

RIV year

2011

Released

08.06.2011

Publisher

ELSEVIER

Location

England

Pages from

1010

Pages to

1017

Pages count

8

URL

BibTex


@article{BUT49893,
  author="Fabian {Khateb} and Nabhan {Khatib} and Jaroslav {Koton}",
  title="Novel Low-Voltage Ultra-Low-Power DVCC Based on Floating-Gate Folded Cascode OTA",
  annote="In this paper, novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of +-0.5 V and ultra-low-power consumption of mere 10 uW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 um CMOS technology are included as well to validate the functionality of the proposed circuit.",
  address="ELSEVIER",
  chapter="49893",
  doi="10.1016/j.mejo.2011.05.001",
  institution="ELSEVIER",
  number="8, IF:0.919",
  volume="2011 (42)",
  year="2011",
  month="june",
  pages="1010--1017",
  publisher="ELSEVIER",
  type="journal article"
}