Publication detail

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

PEČENKA, T. SEKANINA, L. KOTÁSEK, Z.

Original Title

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

English Title

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

Type

journal article - other

Language

en

Original Abstract

This article presents a new real-world application of evolutionary computing in the area of digital-circuits testing. A method is described which enables to evolve large synthetic RTL benchmark circuits with a predefined structure and testability. Using the proposed method, a new collection of synthetic benchmark circuits was developed. These benchmark circuits will be useful in a validation process of novel algorithms and tools in the area of digital-circuits testing. Evolved benchmark circuits currently represent the most complex benchmark circuits with a known level of testability. Furthermore, these circuits are the largest that have ever been designed by means of evolutionary algorithms. This work also investigates suitable parameters of the evolutionary algorithm for this problem and explores the limits in the complexity of evolved circuits.

English abstract

This article presents a new real-world application of evolutionary computing in the area of digital-circuits testing. A method is described which enables to evolve large synthetic RTL benchmark circuits with a predefined structure and testability. Using the proposed method, a new collection of synthetic benchmark circuits was developed. These benchmark circuits will be useful in a validation process of novel algorithms and tools in the area of digital-circuits testing. Evolved benchmark circuits currently represent the most complex benchmark circuits with a known level of testability. Furthermore, these circuits are the largest that have ever been designed by means of evolutionary algorithms. This work also investigates suitable parameters of the evolutionary algorithm for this problem and explores the limits in the complexity of evolved circuits.

Keywords

evolutionary algorithm, digital circuit, testability analysis

RIV year

2008

Released

23.07.2008

Publisher

NEUVEDEN

Location

NEUVEDEN

Pages from

1

Pages to

21

Pages count

21

URL

Documents

BibTex


@article{BUT48172,
  author="Tomáš {Pečenka} and Lukáš {Sekanina} and Zdeněk {Kotásek}",
  title="Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability",
  annote="This article presents a new real-world application of evolutionary computing in
the area of digital-circuits testing. A method is described which enables to
evolve large synthetic RTL benchmark circuits with a predefined structure and
testability. Using the proposed method, a new collection of synthetic benchmark
circuits was developed. These benchmark circuits will be useful in a validation
process of novel algorithms and tools in the area of digital-circuits testing.
Evolved benchmark circuits currently represent the most complex benchmark
circuits with a known level of testability. Furthermore, these circuits are the
largest that have ever been designed by means of evolutionary algorithms. This
work also investigates suitable parameters of the evolutionary algorithm for this
problem and explores the limits in the complexity of evolved circuits.",
  address="NEUVEDEN",
  chapter="48172",
  edition="NEUVEDEN",
  howpublished="print",
  institution="NEUVEDEN",
  journal="ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS",
  number="3",
  volume="13",
  year="2008",
  month="july",
  pages="1--21",
  publisher="NEUVEDEN",
  type="journal article - other"
}