Publication detail
Methodology for Design of Highly Dependable Systems in FPGA
STRAKA, M. KAŠTIL, J. KOTÁSEK, Z.
Original Title
Methodology for Design of Highly Dependable Systems in FPGA
English Title
Methodology for Design of Highly Dependable Systems in FPGA
Type
conference paper
Language
en
Original Abstract
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design highly dependable system in FPGA is described. First, our experiences with partial dynamic reconfiguration in FPGA and application of partial reconfiguration as advanced solution for constructing of different types of fault tolerant architectures are described. Secondly, the main principles of methodology and first experiments with real fault tolerant designs based on partial dynamic reconfiguration implemented into Virtex5 and latest Virtex6 FPGAs are demonstrated.
English abstract
In the paper, a survey of our research activities the goal of which is to develop a methodology allowing to design highly dependable system in FPGA is described. First, our experiences with partial dynamic reconfiguration in FPGA and application of partial reconfiguration as advanced solution for constructing of different types of fault tolerant architectures are described. Secondly, the main principles of methodology and first experiments with real fault tolerant designs based on partial dynamic reconfiguration implemented into Virtex5 and latest Virtex6 FPGAs are demonstrated.
Keywords
system design, fault tolerance, architecture, reconfiguration, FPGA, soft error, methodology
RIV year
2010
Released
25.06.2010
Publisher
The University of Technology Košice
Location
Košice
ISBN
978-80-8086-164-3
Book
International Scientific Conference on Computer Science and Engineering
Edition
NEUVEDEN
Edition number
NEUVEDEN
Pages from
186
Pages to
193
Pages count
8
Documents
BibTex
@inproceedings{BUT35527,
author="Martin {Straka} and Jan {Kaštil} and Zdeněk {Kotásek}",
title="Methodology for Design of Highly Dependable Systems in FPGA",
annote="In the paper, a survey of our research activities the goal of which is to develop
a methodology allowing to design highly dependable system in FPGA is described.
First, our experiences with partial dynamic reconfiguration in FPGA and
application of partial reconfiguration as advanced solution for constructing of
different types of fault tolerant architectures are described. Secondly, the main
principles of methodology and first experiments with real fault tolerant designs
based on partial dynamic reconfiguration implemented into Virtex5 and latest
Virtex6 FPGAs are demonstrated.",
address="The University of Technology Košice",
booktitle="International Scientific Conference on Computer Science and Engineering",
chapter="35527",
edition="NEUVEDEN",
howpublished="print",
institution="The University of Technology Košice",
year="2010",
month="june",
pages="186--193",
publisher="The University of Technology Košice",
type="conference paper"
}