Publication detail

Fast Translated Simulation of ASIPs

PŘIKRYL, Z. KŘOUSTEK, J. HRUŠKA, T. KOLÁŘ, D.

Original Title

Fast Translated Simulation of ASIPs

English Title

Fast Translated Simulation of ASIPs

Type

conference paper

Language

en

Original Abstract

Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.

English abstract

Application-specific instruction set processors are the core of nowadays embedded systems. Therefore, the designers need to have powerful tools for the processor design. The tools should be generated automatically based on a processor description. One of the most important tools is the simulator. It is used during a testing phase of the processor design and during target software development. The key feature of the simulator is its speed. The concept of a special simulation type - translated simulation - is presented in this paper. This simulation exploits information from a target C compiler. Both the simulator and the C compiler are generated based on the processor description in an architecture description language ISAC. Experimental results of this concept show very good simulation speed and fast generation of the simulator.

Keywords

Hardware/sofware co-design, Translated simulation, Architecture description language, Application-specific instruction set processors

RIV year

2010

Released

22.10.2010

Publisher

Masaryk University

Location

Brno

ISBN

978-80-87342-10-7

Book

6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science

Edition

NEUVEDEN

Edition number

NEUVEDEN

Pages from

135

Pages to

142

Pages count

8

BibTex


@inproceedings{BUT35030,
  author="Zdeněk {Přikryl} and Jakub {Křoustek} and Tomáš {Hruška} and Dušan {Kolář}",
  title="Fast Translated Simulation of ASIPs",
  annote="Application-specific instruction set processors are the core of nowadays embedded
systems. Therefore, the designers need to have powerful tools for the processor
design. The tools should be generated automatically based on a processor
description. One of the most important tools is the simulator. It is used during
a testing phase of the processor design and during target software development.
The key feature of the simulator is its speed. The concept of a special
simulation type - translated simulation - is presented in this paper. This
simulation exploits information from a target C compiler. Both the simulator and
the C compiler are generated based on the processor description in an
architecture description language ISAC. Experimental results of this concept show
very good simulation speed and fast generation of the simulator.",
  address="Masaryk University",
  booktitle="6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
  chapter="35030",
  edition="NEUVEDEN",
  howpublished="print",
  institution="Masaryk University",
  year="2010",
  month="october",
  pages="135--142",
  publisher="Masaryk University",
  type="conference paper"
}