Publication detail

Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures

SEKANINA, L. MIKUŠEK, P.

Original Title

Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures

English Title

Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures

Type

conference paper

Language

en

Original Abstract

In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although proposed circuits are very similar, significant differences were demonstrated, namely in the number of unique designs they can implement, the sensitiveness of functions to the inversions in the configuration bitstream and the average number of generations needed to find a target function. These findings are quite unintuitive. Once important (sensitive) bits of the reconfigurable circuit are identified, evolutionary algorithm can incorporate this knowledge. We believe that the proposed type of analysis can help those designers who develop new reconfigurable circuits for evolvable hardware applications.

English abstract

In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although proposed circuits are very similar, significant differences were demonstrated, namely in the number of unique designs they can implement, the sensitiveness of functions to the inversions in the configuration bitstream and the average number of generations needed to find a target function. These findings are quite unintuitive. Once important (sensitive) bits of the reconfigurable circuit are identified, evolutionary algorithm can incorporate this knowledge. We believe that the proposed type of analysis can help those designers who develop new reconfigurable circuits for evolvable hardware applications.

Keywords

reconfigurable device, digital circuit, evolutionary design

RIV year

2008

Released

30.03.2008

Publisher

Springer Verlag

Location

Berlin

ISBN

978-3-540-78760-0

Book

Applications of Evolutionary Computing

Edition

Lecture Notes in Computer Science

Edition number

NEUVEDEN

Pages from

144

Pages to

153

Pages count

10

URL

BibTex


@inproceedings{BUT34273,
  author="Lukáš {Sekanina} and Petr {Mikušek}",
  title="Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures",
  annote="In this paper we propose three small instances of a reconfigurable circuit and
analyze their properties using the brute force method and evolutionary algorithm.
Although proposed circuits are very similar, significant differences were
demonstrated, namely in the number of unique designs they can implement, the
sensitiveness of functions to the inversions in the configuration bitstream and
the average number of generations needed to find a target function. These
findings are quite unintuitive. Once important (sensitive) bits of the
reconfigurable circuit are identified, evolutionary algorithm can incorporate
this knowledge. We believe that the proposed type of analysis can help those
designers who develop new reconfigurable circuits for evolvable hardware
applications.",
  address="Springer Verlag",
  booktitle="Applications of Evolutionary Computing",
  chapter="34273",
  edition="Lecture Notes in Computer Science",
  howpublished="print",
  institution="Springer Verlag",
  journal="Lecture Notes in Computer Science (IF 0,513)",
  year="2008",
  month="march",
  pages="144--153",
  publisher="Springer Verlag",
  type="conference paper"
}