Publication detail

Testability Analysis Driven Data Path Modification And Controller Synthesis

STRNADEL, J. RŮŽIČKA, R.

Original Title

Testability Analysis Driven Data Path Modification And Controller Synthesis

English Title

Testability Analysis Driven Data Path Modification And Controller Synthesis

Type

conference paper

Language

en

Original Abstract

In the paper, it is shown how testability analysis can be utilized both to modify digital data path in order to maximally enhance its testability at minimal costs and to offer information applicable during automated synthesis of a controller used to apply a test to the modified data path.  Our method takes a circuit structure described by means of a net-list as an input. The net-list contains information about how instances of particular module types defined in component libraries are interconnected by means of their interfaces. In both the library and net-list, module types belonging to various description levels (gate, register-transfer, system-on-a-chip etc.) can be placed in order to model multilevel or mixed designs. At the output of the method, modified data path and corresponding controller are produced.

English abstract

In the paper, it is shown how testability analysis can be utilized both to modify digital data path in order to maximally enhance its testability at minimal costs and to offer information applicable during automated synthesis of a controller used to apply a test to the modified data path.  Our method takes a circuit structure described by means of a net-list as an input. The net-list contains information about how instances of particular module types defined in component libraries are interconnected by means of their interfaces. In both the library and net-list, module types belonging to various description levels (gate, register-transfer, system-on-a-chip etc.) can be placed in order to model multilevel or mixed designs. At the output of the method, modified data path and corresponding controller are produced.

Keywords

controller, data path, digital circuit, modification, library, netlist, synthesis, test, testability analysis

RIV year

2009

Released

02.09.2009

Publisher

Brno University of Technology

Location

Brno

ISBN

978-80-214-3933-7

Book

Proceedings of 16th Electronic Devices and Systems IMAPS CS International Conference

Edition

NEUVEDEN

Edition number

NEUVEDEN

Pages from

363

Pages to

368

Pages count

6

URL

Documents

BibTex


@inproceedings{BUT33795,
  author="Josef {Strnadel} and Richard {Růžička}",
  title="Testability Analysis Driven Data Path Modification And Controller Synthesis",
  annote="In the paper, it is shown how testability analysis can be utilized both to modify
digital data path in order to maximally enhance its testability at minimal costs
and to offer information applicable during automated synthesis of a controller
used to apply a test to the modified data path.  Our method takes a circuit
structure described by means of a net-list as an input. The net-list contains
information about how instances of particular module types defined in component
libraries are interconnected by means of their interfaces. In both the library
and net-list, module types belonging to various description levels (gate,
register-transfer, system-on-a-chip etc.) can be placed in order to model
multilevel or mixed designs. At the output of the method, modified data path and
corresponding controller are produced.",
  address="Brno University of Technology",
  booktitle="Proceedings of 16th Electronic Devices and Systems IMAPS CS International Conference",
  chapter="33795",
  edition="NEUVEDEN",
  howpublished="print",
  institution="Brno University of Technology",
  year="2009",
  month="september",
  pages="363--368",
  publisher="Brno University of Technology",
  type="conference paper"
}