Publication detail

Modeling and Signal Integrity Testing of Digital Potentiometers

ŠEVČÍK, B.

Original Title

Modeling and Signal Integrity Testing of Digital Potentiometers

Type

conference paper

Language

English

Original Abstract

This paper describes the practical results of the performance of the digital potentiometers in comparison with Spice-based macromodel for frequencies of several MHz. Verification and validation checks have been performed on the new Spice compatible macromodel developed on the basis of extensive testing of the behavior models from different reputable companies such as Maxim, Analog Devices, Intersil, etc. The real system performance conditions are tested on programmable universal active filter. Subsequently the possibilities of using chain structure are tested and a digital potentiometer with high resolution and applicable to frequencies exceeding 1MHz frequency band is created. Finally, the control software is introduced.

Keywords

Digital potentiometer, chain structure, macromodels, verification, validation, I2C, SPI, Up & Down, PSpice simulation

Authors

ŠEVČÍK, B.

RIV year

2010

Released

24. 6. 2010

ISBN

978-83-928756-3-5

Book

Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2010

Pages from

570

Pages to

575

Pages count

6

BibTex

@inproceedings{BUT33635,
  author="Břetislav {Ševčík}",
  title="Modeling and Signal Integrity Testing of Digital Potentiometers",
  booktitle="Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems MIXDES 2010",
  year="2010",
  pages="570--575",
  isbn="978-83-928756-3-5"
}