Publication detail
Cycle Accurate Profiler for ASIPs
PŘIKRYL, Z. HRUŠKA, T.
Original Title
Cycle Accurate Profiler for ASIPs
English Title
Cycle Accurate Profiler for ASIPs
Type
conference paper
Language
en
Original Abstract
The simulation of one processor on another is an important part of processor development because simulation is the way in witch a designer can verify and validate processor's instruction set, its micro-architecture or program, which will be executed on this processor. But a simple simulation is not sufficient in cases where the developer wants to optimize an executed program or processor's parts. For this purpose a profiler is used. The profiler is a tool tracing processor activities, so it provides the information about utilization of particular parts. In this paper a technique creating a profiler from a processor description in an architecture description language is proposed.
English abstract
The simulation of one processor on another is an important part of processor development because simulation is the way in witch a designer can verify and validate processor's instruction set, its micro-architecture or program, which will be executed on this processor. But a simple simulation is not sufficient in cases where the developer wants to optimize an executed program or processor's parts. For this purpose a profiler is used. The profiler is a tool tracing processor activities, so it provides the information about utilization of particular parts. In this paper a technique creating a profiler from a processor description in an architecture description language is proposed.
Keywords
Profiler, Simulation, Application Specific Instruction-set Processors, Formal Models
RIV year
2009
Released
15.11.2009
Publisher
Masaryk University
Location
Brno
ISBN
978-80-87342-04-6
Book
5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Edition
NEUVEDEN
Edition number
NEUVEDEN
Pages from
168
Pages to
175
Pages count
8
BibTex
@inproceedings{BUT30907,
author="Zdeněk {Přikryl} and Tomáš {Hruška}",
title="Cycle Accurate Profiler for ASIPs",
annote="The simulation of one processor on another is an important part of processor
development because simulation is the way in witch a designer can verify and
validate processor's instruction set, its micro-architecture or program, which
will be executed on this processor. But a simple simulation is not sufficient in
cases where the developer wants to optimize an executed program or processor's
parts. For this purpose a profiler is used. The profiler is a tool tracing
processor activities, so it provides the information about utilization of
particular parts. In this paper a technique creating a profiler from a processor
description in an architecture description language is proposed.",
address="Masaryk University",
booktitle="5th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
chapter="30907",
edition="NEUVEDEN",
howpublished="print",
institution="Masaryk University",
year="2009",
month="november",
pages="168--175",
publisher="Masaryk University",
type="conference paper"
}