Publication detail

Augmented Digital Zero Crossing Timing Error Detector

ŠEBESTA, J.

Original Title

Augmented Digital Zero Crossing Timing Error Detector

Type

conference paper

Language

English

Original Abstract

Improvements of data timing synchronization algorithms applying an augmentation of zero cross error detector are presented in this paper. Describing methods are destined for high speed PSK coherent demodulator. Timing error synchronizers are usually the most complicated subsystems in the demodulator, and they can be often limitary for their implementation in the DSP hardware above all for high-rate data transmission. This contribution is focused on feedback timing estimators based on ML-criterion. There are analyzed a modification of zero crossing detection and shown an easy implementation into DSP system.

Keywords

Timing error detector, Data decision, Coherent detector, Maximum likelihood, Synchronization

Authors

ŠEBESTA, J.

RIV year

2008

Released

15. 12. 2008

Publisher

WSEAS Press

Location

Puerto de la Cruz, Spain

ISBN

978-960-474-035-2

Book

Proceedings of the 7th WSEAS International Conference on Circuits, Systems, Electronics, Control and Signal Processing 2008.

Edition

1

Edition number

1

Pages from

261

Pages to

264

Pages count

4

BibTex

@inproceedings{BUT29601,
  author="Jiří {Šebesta}",
  title="Augmented Digital Zero Crossing Timing Error Detector",
  booktitle="Proceedings of the 7th WSEAS International Conference on Circuits, Systems, Electronics, Control and Signal Processing 2008.",
  year="2008",
  series="1",
  number="1",
  pages="261--264",
  publisher="WSEAS Press",
  address="Puerto de la Cruz, Spain",
  isbn="978-960-474-035-2"
}