Publication detail

Threshold voltage roll-off simulation

RECMAN, M.

Original Title

Threshold voltage roll-off simulation

English Title

Threshold voltage roll-off simulation

Type

conference paper

Language

en

Original Abstract

For short channel MOSFETs, the threshold voltage is reduced if the gate length is decreased and this phenomenon is known as short-channel effect (SCE) or threshold voltage roll-off (VT roll-off). The contribution deals with TCAD simulation of VT roll-off and illustrates how the pocket or halo implant can suppress the short channel effect. The real CMOS technology for low-power application is used. The NMOS transistor structure is generated using ISE TCAD tools DIOS and MDRAW. DESSIS and INSPECT are used to generate device output electrical characteristics and extract threshold voltage values. The experiment contains 18 different NMOSFET process-device simulations. The simulations are run under GENESISe.

English abstract

For short channel MOSFETs, the threshold voltage is reduced if the gate length is decreased and this phenomenon is known as short-channel effect (SCE) or threshold voltage roll-off (VT roll-off). The contribution deals with TCAD simulation of VT roll-off and illustrates how the pocket or halo implant can suppress the short channel effect. The real CMOS technology for low-power application is used. The NMOS transistor structure is generated using ISE TCAD tools DIOS and MDRAW. DESSIS and INSPECT are used to generate device output electrical characteristics and extract threshold voltage values. The experiment contains 18 different NMOSFET process-device simulations. The simulations are run under GENESISe.

Released

01.01.2006

Publisher

Nakl. Novotný

Location

Brno

ISBN

960-8025-99-8

Book

Electronic System Design 2006, Socrates International Conference Proceedings Chania, October 16 – 17, 2006, Greece

Pages from

88

Pages to

91

Pages count

4

BibTex


@inproceedings{BUT24697,
  author="Milan {Recman}",
  title="Threshold voltage roll-off simulation",
  annote="For short channel MOSFETs, the threshold voltage is reduced if the gate length is decreased and this phenomenon is known as short-channel effect (SCE) or threshold voltage roll-off (VT roll-off). The contribution deals with TCAD simulation of VT roll-off and illustrates how the pocket or halo implant can suppress the short channel effect. The real CMOS technology for low-power application is used. The NMOS transistor structure is generated using ISE TCAD tools DIOS and MDRAW. DESSIS and INSPECT are used to generate device output electrical characteristics and extract threshold voltage values. The experiment contains 18 different NMOSFET process-device simulations. The simulations are run under GENESISe.",
  address="Nakl. Novotný",
  booktitle="Electronic System Design 2006, Socrates International Conference Proceedings Chania, October 16 – 17, 2006, Greece",
  chapter="24697",
  institution="Nakl. Novotný",
  year="2006",
  month="january",
  pages="88",
  publisher="Nakl. Novotný",
  type="conference paper"
}