Publication detail

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

MAREK, T., CRHA, L., NOVOTNÝ, M.

Original Title

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

English Title

Design and Implementation of the Memory Scheduler for the FPGA - Based Router

Type

conference paper

Language

en

Original Abstract

This paper deals with a design of a memory scheduler as a part of the Liberouter project.

English abstract

This paper deals with a design of a memory scheduler as a part of the Liberouter project.

Keywords

FPGA, DDR SDRAM, memory, router, IPV6

RIV year

2004

Released

01.09.2004

Publisher

Springer Verlag

Location

Leuven

ISBN

3-540-22989-2

Book

Proc. of the Field Programmable Logic and Application 2004

Pages from

1133

Pages to

1139

Pages count

6

Documents

BibTex


@inproceedings{BUT17581,
  author="Tomáš {Marek} and Luděk {Bryan} and Martin {Novotný}",
  title="Design and Implementation of the Memory Scheduler for the FPGA - Based Router",
  annote="This paper deals with a design of a memory scheduler as a part of the Liberouter project. 
", address="Springer Verlag", booktitle="Proc. of the Field Programmable Logic and Application 2004", chapter="17581", institution="Springer Verlag", year="2004", month="september", pages="1133--1139", publisher="Springer Verlag", type="conference paper" }