Publication detail

Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems

LOJDA, J. PODIVÍNSKÝ, J. KOTÁSEK, Z.

Original Title

Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems

Type

conference paper

Language

English

Original Abstract

As electronic systems penetrate into areas in which reliable computing is required, new methods incorporating reliability into these systems arise. It is important to properly test and evaluate parameters of such methods before the actual implementation and the practical usage in an application. Generally, in our research, we are focusing on the acceleration of reliable design through creation of automation methods. However, for this purpose, it is important to develop tools to automatically analyze reliability properties of the system after the method is applied. In our previous work, we developed the Fault Tolerance ESTimation (FT-EST) framework, which specializes on minimizing the requirement for user intervention. In this paper, we are using the framework to collect the data, however, the research presented in this paper primarily focuses on the possibility to automatically analyze such data. Our previous papers were focused on particular methods of the automatic reliability insertion and evaluation while this paper introduces new reliability indicators based on low-level properties of FPGA configuration bitstreams. Currently, we are limiting our research to SRAM-based FPGA systems and focus on the VHDL and C++ (in the combination with High-level Synthesis) languages.

Keywords

Fault Tolerance Evaluation, Fault-tolerant Design Automation, Analysis, FPGA, Fault Tolerance Estimation Tool, High-level Synthesis, Catapult C, Redundant Data Type

Authors

LOJDA, J.; PODIVÍNSKÝ, J.; KOTÁSEK, Z.

Released

11. 3. 2019

Publisher

IEEE Computer Society

Location

Santiago

ISBN

978-1-7281-1756-0

Book

20th IEEE Latin American Test Symposium (LATS 2019)

Pages from

93

Pages to

96

Pages count

4

URL

BibTex

@inproceedings{BUT156291,
  author="Jakub {Lojda} and Jakub {Podivínský} and Zdeněk {Kotásek}",
  title="Reliability Indicators for Automatic Design and Analysis of Fault-Tolerant FPGA Systems",
  booktitle="20th IEEE Latin American Test Symposium (LATS 2019)",
  year="2019",
  pages="93--96",
  publisher="IEEE Computer Society",
  address="Santiago",
  doi="10.1109/LATW.2019.8704593",
  isbn="978-1-7281-1756-0",
  url="https://www.fit.vut.cz/research/publication/11870/"
}