Publication detail

Design and implementation of sub 0.5-V OTAs in 0.18 um CMOS

KULEJ, T. KHATEB, F.

Original Title

Design and implementation of sub 0.5-V OTAs in 0.18 um CMOS

Type

journal article in Web of Science

Language

English

Original Abstract

A family of bulk-driven CMOS operational transconductance amplifiers (OTAs) has been designed for extremely low supply voltages (0.3-0.5V). Three OTA design schemes with different gain boosting techniques and class AB input/output stages are discussed. A detailed comparison among these schemes has been presented in terms of performance characteristics such as voltage gain, gain bandwidth product (GBW), slew rate (SR), circuit sensitivity to process/mismatch variations and silicon area. The design procedures for all the compared structures have been developed. The OTAs have been fabricated in a standard 0.18 um n-well CMOS process from TSMC. Chip test results are in good agreement with theoretical predictions and simulations.

Keywords

Bulk-driven, Operational transconductance amplifiers, Truly differential amplifiers, Low-voltage, Low- power

Authors

KULEJ, T.; KHATEB, F.

Released

30. 1. 2018

Publisher

WILEY-BLACKWELL

Location

England

ISBN

0098-9886

Periodical

International Journal of Circuit Theory and Applications.

Year of study

46

Number

6, IF: 1.444

State

United Kingdom of Great Britain and Northern Ireland

Pages from

1129

Pages to

1143

Pages count

15

URL

http://dx.doi.org/10.1002/cta.2465

BibTex

@article{BUT144890,
  author="Tomasz {Kulej} and Fabian {Khateb}",
  title="Design and implementation of sub 0.5-V OTAs in 0.18 um CMOS",
  journal="International Journal of Circuit Theory and Applications.",
  year="2018",
  volume="46",
  number="6,  IF: 1.444",
  pages="1129--1143",
  doi="10.1002/cta.2465",
  issn="0098-9886",
  url="http://dx.doi.org/10.1002/cta.2465"
}