Publication detail

A Methodology for Designing Communication Architectures for Multiprocessor SoCs

DVOŘÁK, V., KUTÁLEK, V.

Original Title

A Methodology for Designing Communication Architectures for Multiprocessor SoCs

English Title

A Methodology for Designing Communication Architectures for Multiprocessor SoCs

Type

conference paper

Language

en

Original Abstract

Multiprocessor SoCs (MSoCs) for network and stream processing have to cope with growing speed and flexibility requirements of new complex packet processing tasks. Performance optimization of a homogenous network of CPUs in a certain application leads basically to optimization of CPUs interconnect and communication algorithms. Several on-chip communication architectures are compared with respect to their cost, simplicity of routing algorithms, and performance in collective communications. It is shown, that if group communication patterns are considered in certain proportions, the fat cube architecture rather than Octagonal architecture may have the best performance/cost figure. A methodology for designing efficient on-chip interconnects on regular group communication patterns is suggested. It may be useful if the system is targeted for specific class of applications.

English abstract

Multiprocessor SoCs (MSoCs) for network and stream processing have to cope with growing speed and flexibility requirements of new complex packet processing tasks. Performance optimization of a homogenous network of CPUs in a certain application leads basically to optimization of CPUs interconnect and communication algorithms. Several on-chip communication architectures are compared with respect to their cost, simplicity of routing algorithms, and performance in collective communications. It is shown, that if group communication patterns are considered in certain proportions, the fat cube architecture rather than Octagonal architecture may have the best performance/cost figure. A methodology for designing efficient on-chip interconnects on regular group communication patterns is suggested. It may be useful if the system is targeted for specific class of applications.

Keywords

Communication architecture, Multiprocessor SoC, Stream multiprocessing, Group communication complexity

RIV year

2003

Released

03.06.2003

Publisher

IEEE Computer Society

Location

Belek

ISBN

0-7695-2003-0

Book

Proceedings EUROMICRO Symposium on Digital System Design - Architectures, Methods and Tools DSD 2003

Pages from

455

Pages to

458

Pages count

4

Documents

BibTex


@inproceedings{BUT14162,
  author="Václav {Dvořák} and Vladimír {Kutálek}",
  title="A Methodology for Designing Communication Architectures for Multiprocessor SoCs",
  annote="Multiprocessor SoCs (MSoCs) for network and stream processing have to cope with growing speed and flexibility requirements of new complex packet processing tasks. Performance optimization of a homogenous network of CPUs in a certain application leads basically to optimization of CPUs interconnect and communication algorithms. Several on-chip communication architectures are compared with respect to their cost, simplicity of routing algorithms, and performance in collective communications. It is shown, that if group communication patterns are considered in certain proportions, the fat cube architecture rather than Octagonal architecture may have the best performance/cost figure. A methodology for designing efficient on-chip interconnects on regular group communication patterns is suggested. It may be useful if the system is targeted for specific class of applications.",
  address="IEEE Computer Society",
  booktitle="Proceedings EUROMICRO Symposium on Digital System Design - Architectures, Methods and Tools DSD 2003",
  chapter="14162",
  institution="IEEE Computer Society",
  year="2003",
  month="june",
  pages="455--458",
  publisher="IEEE Computer Society",
  type="conference paper"
}