Publication detail

Implementace algoritmu AES na FPGA

SMÉKAL, D.

Original Title

Implementace algoritmu AES na FPGA

English Title

Implementation of AES algorithm on FPGA

Type

conference paper

Language

Czech

Original Abstract

Článek popisuje VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementaci algoritmu AES (Advanced Encryption Standard) na FPGA kartu (Field-Programmable Gate Array), která používá čip Virtex-7 od společnosti Xilinx. V tomto projektu je hlavním zájmem realizovat všechny části algoritmu na hardware.

English abstract

This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (Field-Programmable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.

Keywords

Kryptografie, FPGA, AES, VHDL

Key words in English

Cryptography, FPGA, AES, VHDL

Authors

SMÉKAL, D.

RIV year

2015

Released

23. 4. 2015

Publisher

Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních

Location

Brno

ISBN

978-80-214-5148-3

Book

Proceedings of the 21st Conference STUDENT EEICT 2015

Edition number

první

Pages from

193

Pages to

195

Pages count

3

URL

http://www.feec.vutbr.cz/EEICT/2015/sbornik/EEICT-2015-sbornik-komplet_v2.pdf

BibTex

@inproceedings{BUT115855,
  author="David {Smékal}",
  title="Implementace algoritmu AES na FPGA",
  booktitle="Proceedings of the 21st Conference STUDENT EEICT 2015",
  year="2015",
  number="první",
  pages="193--195",
  publisher="Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních",
  address="Brno",
  isbn="978-80-214-5148-3",
  url="http://www.feec.vutbr.cz/EEICT/2015/sbornik/EEICT-2015-sbornik-komplet_v2.pdf"
}