Publication detail

Area Efficient Implementation of Fast Fourier Transform for ASIC

DVORÁK, V. FUJCIK, L. PRISTACH, M.

Original Title

Area Efficient Implementation of Fast Fourier Transform for ASIC

Type

conference paper

Language

English

Original Abstract

The paper presents an architecture of a module for computation of a Discrete Fourier Transform with a Fast Fourier Transform algorithm. The architecture is optimized for low area implementation and is suitable for implementation in application specific integrated circuits (ASIC). Software in C++ was written for automatic FFT module generation with various parameters. The software generates fully synthesizable VHDL code and SystemVerilog testbench for verification.

Keywords

application specific integrated circuit, complex number multiplication, digital signal processing, Discrete Fourier Transform, Fast Fourier Transform, fixed-point arithmetic, Radix-2 FFT

Authors

DVORÁK, V.; FUJCIK, L.; PRISTACH, M.

RIV year

2014

Released

9. 7. 2015

Publisher

Asszisztencia Szervezó Kft.

Location

Budapest, Hungary

ISBN

978-80-214-4983-1

Book

37th International Conference on Telecommunications and Signal Processing (TSP)

Pages from

753

Pages to

755

Pages count

3

URL

https://ieeexplore.ieee.org/document/7296365

BibTex

@inproceedings{BUT108109,
  author="Vojtěch {Dvořák} and Lukáš {Fujcik} and Marián {Pristach}",
  title="Area Efficient Implementation of Fast Fourier Transform for ASIC",
  booktitle="37th International Conference on Telecommunications and Signal Processing (TSP)",
  year="2015",
  pages="753--755",
  publisher="Asszisztencia Szervezó Kft.",
  address="Budapest, Hungary",
  doi="10.1109/TSP.2015.7296365",
  isbn="978-80-214-4983-1",
  url="https://ieeexplore.ieee.org/document/7296365"
}