Publication detail

A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design

METIN, B. HERENCSÁR, N. CICEKOGLU, O.

Original Title

A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design

English Title

A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design

Type

journal article in Web of Science

Language

en

Original Abstract

This paper presents a simple electronically tunable voltage-mode first-order all-pass filter realization with MOSFET-C technique. In comparison to the classical MOSFET-C filter circuits that employ active elements including large number of transistors the proposed circuit is only composed of a single two n-channel MOSFET-based inverting voltage buffer, three passive components, and one NMOS-based voltage-controlled resistor, which is with advantage used to electronically control the pole frequency of the filter in range 103 kHz to 18.3 MHz. The proposed filter is also very suitable for low-voltage operation, since between its supply rails it uses only two MOSFETs. In the paper the effect of load is investigated. In addition, in order to suppress the effect of non-zero output resistance of the inverting voltage buffer, two compensation techniques are also introduced. The theoretical results are verified by SPICE simulations using PTM 90 nm level-7 CMOS process BSIM3v3 parameters, where +/- 0.45 V supply voltages are used. Moreover, the behavior of the proposed filter was also experimentally measured using readily available array transistors CD4007UB by Texas Instruments.

English abstract

This paper presents a simple electronically tunable voltage-mode first-order all-pass filter realization with MOSFET-C technique. In comparison to the classical MOSFET-C filter circuits that employ active elements including large number of transistors the proposed circuit is only composed of a single two n-channel MOSFET-based inverting voltage buffer, three passive components, and one NMOS-based voltage-controlled resistor, which is with advantage used to electronically control the pole frequency of the filter in range 103 kHz to 18.3 MHz. The proposed filter is also very suitable for low-voltage operation, since between its supply rails it uses only two MOSFETs. In the paper the effect of load is investigated. In addition, in order to suppress the effect of non-zero output resistance of the inverting voltage buffer, two compensation techniques are also introduced. The theoretical results are verified by SPICE simulations using PTM 90 nm level-7 CMOS process BSIM3v3 parameters, where +/- 0.45 V supply voltages are used. Moreover, the behavior of the proposed filter was also experimentally measured using readily available array transistors CD4007UB by Texas Instruments.

Keywords

Analog signal processing, all-pass filter, output resistance compensation techniques, first-order filter, inverting voltage buffer, loading effect, MOSFET-C filter, MOS resistive cell, tunable filter, voltage-mode.

RIV year

2013

Released

02.12.2013

Pages from

985

Pages to

994

Pages count

10

BibTex


@article{BUT102719,
  author="Bilgin {Metin} and Norbert {Herencsár} and Oguzhan {Cicekoglu}",
  title="A Low-Voltage Electronically Tunable MOSFET-C Voltage-Mode First-Order All-Pass Filter Design",
  annote="This paper presents a simple electronically tunable voltage-mode first-order all-pass filter realization with MOSFET-C technique. In comparison to the classical MOSFET-C filter circuits that employ active elements including large number of transistors the proposed circuit is only composed of a single two n-channel MOSFET-based inverting voltage buffer, three passive components, and one NMOS-based voltage-controlled resistor, which is with advantage used to electronically control the pole frequency of the filter in range 103 kHz to 18.3 MHz. The proposed filter is also very suitable for low-voltage operation, since between its supply rails it uses only two MOSFETs. In the paper the effect of load is investigated. In addition, in order to suppress the effect of non-zero output resistance of the inverting voltage buffer, two compensation techniques are also introduced. The theoretical results are verified by SPICE simulations using PTM 90 nm level-7 CMOS process BSIM3v3 parameters, where +/- 0.45 V supply voltages are used. Moreover, the behavior of the proposed filter was also experimentally measured using readily available array transistors CD4007UB by Texas Instruments.",
  chapter="102719",
  number="4",
  volume="22",
  year="2013",
  month="december",
  pages="985--994",
  type="journal article in Web of Science"
}