ČeskyLog in
  • QS Top Universities
  • Join us in research
  • Research centres
  • Brno University of Technology - Centre of Sports Activities
  • BUT halls of residence belong to top 3

  • Pravděpodobně máte vypnutý JavaScript. Některé funkce portálu nebudou funkční.

Course detail

Microprocessors

Subjet code : FEKT-CMIC
Faculty: Faculty of Electrical Engineering and Communication
Academic year: 2011/2012
Open: No
Supervisor: Ing. Tomáš Macho, Ph.D.
Department: Department of Control and Instrumentation
Study level: Bachelor's
Study form: full-time study
Language of instruction: English
Number of credits: 6
Completion: course-unit credit and examination
Year of study: 2
Semester: summer
Duty: compulsory

The study programmes with the given course

Objective of the course – aims of the course unit:
To give students base informations about principles of microprocessors and microcontrollers, about creating software for them and about designing microprocessor systems and embedded systems.
Objective of the course – learning outcomes and competences:
Students are able to design microprocessor circuitry and create SW equipement for microprocessor systems.
Prerequisites:
The subject knowledge on the secondary school level is required.
Course contents (annotation):
Logical functions, Bool's algebraic, combination and sequence circuits. Principles of microprocessor. Addressing. Subrutins, interrups, stack utilisation. Von Neuman and harward conception of computer. Overlapping and pipelining. Superscalar architecture. CISC a RISC processors.
Microcontrollers Motorola HCS12: SW model. Instruction set. Peripherals: Parallel Input/Output, A/D convertor, timer system, SCI, SPI. Connectios microprocessor with external components as memoris, A/D and D/A convertors, keyboard, display. Segmentation, paging, memory virtualisations. Intel Pentium: Addressing modes. Virtual addressing. Real mode and protected mode. Memory protection. Gates. Proces switching. Paging unit. Interrupts. Embedded systems.
Teaching methods and criteria:
Teaching methods depend on the type of course unit as specified in the article 7 of BUT Rules for Studies and Examinations.
Assesment methods and criteria linked to learning outcomes:
Work of students is evaluated during study by tests in exercises. They can obtain maximum 40 points by these tests during semester.
Final examination is evaluated by 60 points at maximum.
Course curriculum:
1. Introduction. Definition of logical circuit, two states signals. Mathematical logic, logical function, Boole's algebraic. Completely and uncompletely defined logical function. Description of logic function by table and by algebraic form (UDNF, UKNF). Simplification of logical functions. Algebraic simplification. Realization of logical circuits wits NAND and NOR. Karnaug's map.
2. Base combination logical blocks (binary decoder, multiplexor, demultiplexor, priority coder, digital comparator, code transformation).
3. Principal of flip-flop, RS, D, JK, T, master-slave flip-flop. Sequence logical circuits: finite state automat, Huffman's model of automat, Mealy automat, Moor automat.
4. Data registers, shift registers, synchronous and asynchronous counters, deviders.
5. Von Neumanns` conception of computer. Base cycle of computer. Computer block diagram, ALU, controller, registers, memory, peripheral devices. Memory organization. Microprocessor, microcontroller, digital signal processor, digital signal controller.
6. Program, instruction, instruction set, types of instruction, number of operands, instruction set architecture. Addressing modes.
7. Machine code, assembler. Subrutins , stacks manipulation. Difference between subrutin and macro. Stack and C language.
8. Programmed I/O: polling, interrupt-driven I/O, using DMA. Synchronous and asynchronous interrupts. Interrupt servicing. Mask, nonmask and pseudomask interrupts. Reset.
9. Microcontrollers Motorola HCS12 family: ports, CRG units (oscillator, PLL, real-time interrupt , Watchdog (COP)), timers, A/D convertor..
10. Von Neumann, Harvard and modified Harvard architectures. Pipelining, problems of pipelining.. Superscalar architecture. Multiprocessor systems and processor fields.
11. Memories, memory parameter. Principle and property of memory: SRAM, DRAM, SDRAM, DDR RAM, FeRAM, MRAM, EPROM, EEPROM, FLASH.
12.Memory bus interface. Principle of locality, memory hierarchy, memory cache.
13. Memory management. No memory abstraction. Dynamic relocation, base and limit registers. MMU. Paging and segmentation. Virtual memory.
Specification of controlled education, way of implementation and compensation for absences:
The content and forms of instruction in the evaluated course are specified by a regulation issued by the lecturer responsible for the course and updated for every academic year.
Recommended reading:
Brandejs, M., Mikroprocesory Intel 8086 - 80486. Praha: Grada, 1991. 256 s. ISBN 80-85424-27-4.
Ličev L., Morkes D., Procesory - architektura, funkce, použití. Brno: Computer press, 1999. 260 s. ISBN 80-7226-172-X.

Type of course unit:
Lecture: 26 hours, optionally
Teacher: Ing. Tomáš Macho, Ph.D.
Computer exercise: 39 hours, compulsory
Teacher: Ing. Tomáš Macho, Ph.D.