Course contents (annotation):|
Logical functions, Bool's algebraic, combination and sequence circuits. Principles of microprocessor. Addressing. Subrutins, interrups, stack utilisation. Von Neuman and harward conception of computer. Overlapping and pipelining. Superscalar architecture. CISC a RISC processors.
Microcontrollers Motorola HCS12: SW model. Instruction set. Peripherals: Parallel Input/Output, A/D convertor, timer system, SCI, SPI. Connectios microprocessor with external components as memoris, A/D and D/A convertors, keyboard, display. Segmentation, paging, memory virtualisations. Intel Pentium: Addressing modes. Virtual addressing. Real mode and protected mode. Memory protection. Gates. Proces switching. Paging unit. Interrupts. Embedded systems.
1. Introduction. Definition of logical circuit, two states signals. Mathematical logic, logical function, Boole's algebraic. Completely and uncompletely defined logical function. Description of logic function by table and by algebraic form (UDNF, UKNF). Simplification of logical functions. Algebraic simplification. Realization of logical circuits wits NAND and NOR. Karnaug's map.
2. Base combination logical blocks (binary decoder, multiplexor, demultiplexor, priority coder, digital comparator, code transformation).
3. Principal of flip-flop, RS, D, JK, T, master-slave flip-flop. Sequence logical circuits: finite state automat, Huffman's model of automat, Mealy automat, Moor automat.
4. Data registers, shift registers, synchronous and asynchronous counters, deviders.
5. Von Neumanns` conception of computer. Base cycle of computer. Computer block diagram, ALU, controller, registers, memory, peripheral devices. Memory organization. Microprocessor, microcontroller, digital signal processor, digital signal controller.
6. Program, instruction, instruction set, types of instruction, number of operands, instruction set architecture. Addressing modes.
7. Machine code, assembler. Subrutins , stacks manipulation. Difference between subrutin and macro. Stack and C language.
8. Programmed I/O: polling, interrupt-driven I/O, using DMA. Synchronous and asynchronous interrupts. Interrupt servicing. Mask, nonmask and pseudomask interrupts. Reset.
9. Microcontrollers Motorola HCS12 family: ports, CRG units (oscillator, PLL, real-time interrupt , Watchdog (COP)), timers, A/D convertor..
10. Von Neumann, Harvard and modified Harvard architectures. Pipelining, problems of pipelining.. Superscalar architecture. Multiprocessor systems and processor fields.
11. Memories, memory parameter. Principle and property of memory: SRAM, DRAM, SDRAM, DDR RAM, FeRAM, MRAM, EPROM, EEPROM, FLASH.
12.Memory bus interface. Principle of locality, memory hierarchy, memory cache.
13. Memory management. No memory abstraction. Dynamic relocation, base and limit registers. MMU. Paging and segmentation. Virtual memory.